Signal Processing and Machine Learning on Reconfigurable Hardware
Hendrik Wöhrle, Johannes Teiwes
In Proceedings of the RIC Project Day Workgroups "Electronic Design" and "Mechatronic Design", 24.7.2014, Bremen, Selbstverlag, series DFKI Documents, volume 14-05, pages 48-49, Jul/2014. DFKI Robotics Innovation Center Bremen. DFKI GmbH. ISBN: ISSN 0946-0098.
Zusammenfassung (Abstract)
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In this poster, the framework reSPACE for signal processing and machine learning on reconfigurable hardwareis introduced. It allows to rapidly develop application-specific, FPGA-based hardware accelerators to Speed up certain computational intensive data processing tasks. The underlying computational model is the static heterogeneous synchronous dataflow computing paradigm. In order to make the hardware accelerators accessible, it utilizes various model-based software Generation techniques to automatically generate device drivers and test facilities for simulation- and hardware-based verification.
